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ADSP-BF531 / ADSP-BF532 / ADSP-BF533
SPECIFICATIONS
Component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min Nominal
Max Unit
V DDINT Internal Supply Voltage
1
Nonautomotive 400 MHz and 500 MHz speed grade models
2
0.8 1.2
1.45
V
V DDINT Internal Supply Voltage
1
Nonautomotive 533 MHz speed grade models
2
0.8 1.25
1.45
V
V DDINT Internal Supply Voltage
1
600 MHz speed grade models
2
0.8 1.30
1.45
V
V DDINT Internal Supply Voltage 1
Automotive 400 MHz speed grade models 2
0.95 1.2
1.45
V
Automotive 533 MHz speed grade models
V DDINT Internal Supply Voltage
1
2
0.95 1.25
1.45
V
V DDEXT External Supply Voltage
V DDEXT External Supply Voltage
3
Nonautomotive grade models
2
Automotive grade models
2
1.75 1.8/3.3
2.7 3.3
3.6
3.6
V
V
V DDRTC Real-Time Clock
Nonautomotive grade models 2
1.75 1.8/3.3
3.6
V
Power Supply Voltage
V DDRTC Real-Time Clock
Automotive grade models 2
2.7 3.3
3.6
V
Power Supply Voltage
V IH
High Level Input Voltage 4, 5
V DDEXT =1.85 V
1.3
V
V IH
High Level Input Voltage
4, 5
V DDEXT =Maximum
2.0
V
V IHCLKIN High Level Input Voltage
6
V DDEXT =Maximum
2.2
V
V IL
Low Level Input Voltage
7
V DDEXT =1.75 V
+0.3 V
V IL
Low Level Input Voltage 7
V DDEXT =2.7 V
+0.6 V
T J
Junction Temperature
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T AMBIENT = 0°C to +70°C
0
+95
°C
T J
T J
Junction Temperature
Junction Temperature
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T AMBIENT = –40°C to +85°C –40
160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T AMBIENT = –40°C to +105°C –40
+105 °C
+125 °C
T J
T J
T J
Junction Temperature
Junction Temperature
Junction Temperature
169-Ball Plastic Ball Grid Array (PBGA) @ T AMBIENT = –40°C to +105°C
169-Ball Plastic Ball Grid Array (PBGA) @ T AMBIENT = –40°C to +85°C
176-Lead Quad Flatpack (LQFP) @ T AMBIENT = –40°C to +85°C
–40
–40
–40
+125 °C
+105 °C
+100 °C
1
2
3
4
5
6
7
The regulator can generate V DDINT at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with –4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance.
See Ordering Guide on Page 63 .
When V DDEXT < 2.25 V, on-chip voltage regulation is not supported.
Applies to all input and bidirectional pins except CLKIN.
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are 3.3 V tolerant (always accepts up to 3.6 V maximum V IH ), but voltage compliance (on outputs, V OH ) depends on
the input V DDEXT , because V OH (maximum) approximately equals V DDEXT (maximum). This 3.3 V tolerance applies to bidirectional pins (DATA15–0, TMR2–0, PF15–0, PPI3–0,
RSCLK1–0, TSCLK1–0, RFS1–0, TFS1–0, MOSI, MISO, SCK) and input only pins (BR, ARDY, PPI_CLK, DR0PRI, DR0SEC, DR1PRI, DR1SEC, RX, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE1–0).
Applies to CLKIN pin only.
Applies to all input and bidirectional pins.
Rev. I
|
Page 20 of 64 |
August 2013
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